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HARDWARE IMPLEMENTATION FOR FAST CONVOLUTION WITH A PN CODE USING FIELD PROGRAMABBLE GATE ARRAY


VLSI(very large scale integration) is a process of placing thousands of electronic components on a single chip .This paper covers the one of the applications of vlsi i.e FPGA(field programmable gate array).FPGA is a semiconductor device containing programmable logic components and programmable interconnects. The programmable logic components interconnects can be programmed to duplicate the functionality of basic logic gates such as AND ,OR ,XOR, NOT or more complex combinational functions as decoders or simple math functions and also include memory elements which may be simple flip-flops. In code division multiple access (CDMA) system, receivers spend long time to acquire the signals. This is mostly due to the use of expensive FFT-based convolvers in the acquisition process. This paper shows a substitute algorithm for calculating the convolution that requires less computation time. The algorithm uses Walsh transform instead of FFT ‘s. FFT based algorithm requires 2 FFTs and one IFFT in addition to complex multiplications and additions. On the other hand, in the Walsh-based method the Walsh transform is required once and there are no multiplications. Therefore, using the Walsh-based algorithm can cut the processing time to about 5 percent of the required time. The additional steps in this algorithm are permutation of the input samples and the output results. The design uses a field programmable gate array (FPGA) to apply parallel processing concept. This paper discusses the algorithm and the implementation issues. A case study of a large code was applied. The whole system is implemented and showed high performance that speedup the process 2500 times the speed of a microprocessor based design.
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